FPGASiena2017

Continuing with Adam Taylor's tutorials in his MicroZed Chronicles on the XADC. This post relates to issue 106, which can be found using the link at the bottom of the page. What I learned from Adam's Tutorial: This tutorial is a continuation of issue 105. Here, the interrupt latency we will be measuring is the time required to start executing the ISR. We left off in Vivado having just created the Bitstream. Now we are ready to move into SDK. Export Hardware > Check Include Bitstream > Launch SDK Once in SDK: File > New > Board Support Package > Finish File > New > Application Project > Hello World > Finish Copy and paste in the .C file from Adam Taylor's github (https://github.com/ATaylorCEngFIET/MicroZed-Chronicles) and replace it with helloworld.c and SAVE IT. Next launch minicom > Program FPGA > Run You should see something similar to this within minicom:   This is reading the value on the AXI Timer as soon as the ...

Continuing with Adam Taylor's tutorials in his MicroZed Chronicles on the XADC. This post relates to issue 105, which can be found using the link at the bottom of the page. What I learned from Adam's Tutorial: Interrupt Latency: The time between the interrupt being raised and the interrupt being serviced. Once a signal is in the XADC and the Zynq SoC, it is necessary to ensure that the application has been designed properly to meet the requirements and perform in the way intended. Interrupt latency plays a major role in performance.  Some issues that can impact interrupt latency are: The presence of an operating system The complexity of the ISR (Interrupt Service Routine) If interrupt latency is not considered, the application could fail depending upon the latency period, latency consistency and the time taken for the ISR. If latency is too great or ISR execution is too long, events can be missed. When this happens, it results in an unreliable system with sp...

Continuing with Adam Taylor's tutorials in his MicroZed Chronicles on the XADC. This post relates to issue 104, which can be found using the link at the bottom of the page. What I learned from Adam's Tutorial: An XADC is used to read in an analog signal and process the information. To interface with the XADC an AXI interface is needed Interface Options Include:  Connecting with an AXI4-Lite Interface Adding an AXI streaming interface to add further signal processing (like the FIR Filter) The first choice that needs to be made is the selection of the input pins The XADC has two dedicated differential input pins, Vp and Vn, which can be used to sample analog signals. There are also 16 auxiliary inputs that can be used. These have a lower FRBW (Full Resolution Bandwidth) of 250 kHz whereas the dedicated inputs have an FRBW of 500 kHz . If using signals near the max Nyquist frequency, use the dedicated  inputs.  If there are more than one signal ...

Continuing with Adam Taylor's tutorials in his MicroZed Chronicles on the XADC. This post relates to issue 43, which can be found using the link at the bottom of the page. What I learned from Adam's Tutorial: The Zynq SoC has the ability to monitor its own supply voltages and temperature. We can use this ability to verify the initial supply voltages and operating temperature. We can also check to ensure that the parameters remain within the specified ranges throughout operation.  This can help us to determine if the Zynq SoC's environment has any problems that could possibly result in a failure over time. An example could be a drifting power supply. The SoC has a number of maskable interrupts that can interrupt the 2 on-chip ARM processors if an alarm parameter exceeds its range. A maskable interrupt can be disabled by the programmer, so if an interrupt happens, the CPU can ignore it and not have to respond. Above definition from: https://www.quora....

Adam Taylor has multiple tutorials in his MicroZed Chronicles on the XADC. This post relates to issue 7 and 8. These can be found using the link at the bottom of the page. What I learned from Adam's Tutorials: The Zynq SoC's XADC block contains two 12-bit ADC inputs with additional input channels connected to on-chip voltages and temp sensors.   The XADC is capable of unipolar (only + or only -) or bipolar (both + and - range) measurements. Each analog input is differential. The 17 differential inputs are split between one dedicated analog input pair (VP/VN) and 16 auxiliary inputs that can be configured as either analog or digital I/O pins (VAuxP/VAuxN). The effective input signal band width depends on which input is being utilized VP/VN = 500kHz Axiliary = < 251kHz To add the XADC to the Block Diagram Add the Zynq Processing System and the XADC Wizard then run the block automation and the connection automation. It should look similar to the picture b...

https://embeddedcentric.com/adc-dac-and-digital-audio-processing/ LAB 8 ***Helpful Note: The tutorial doesn't specify this, but you will need minicom open when running the program. Also if a warning appears after you have created the HDL wrapper you should be okay to continue anyway. Summary: In this lab, we use the ADAU1761 audio codec chip (coder-decoder) mounted on the Zed board, to output different pitches using the switches. Inside the codec are two ADCs, Right Channel and Left Channel, that we used to sample audio. The NCO generates samples of the sine waves at the designated frequencies and these samples are superpositioned and sent to the DACs through the I2S bus, so that they can be played on the speaker. ADAU1761 is and audio codec chip located on the Zedboard used for audio processing. Used for acoustic purposes (playing, recording, processing). The sample frequency is generated by the PLL logic which is driven by a master clock supplied by an external s...

If you encounter a problem where you are unable to run a program on the FPGA board after it has been programmed, here are some things to try: 1) Instead of right clicking on the folder --> Run As --> Launch on Hardware GDB, try running it using the green play button at the top of SDK 2) If you are still unable to run, try relaunching SDK from Vivado and run it again.